Re: [PATCH v3 3/7] target/arm: Honor the HCR_EL2.TSW bit

2020-02-25 Thread Peter Maydell
On Tue, 18 Feb 2020 at 19:10, Richard Henderson wrote: > > These bits trap EL1 access to set/way cache maintenance insns. > > Buglink: https://bugs.launchpad.net/bugs/1863685 > Signed-off-by: Richard Henderson > --- > target/arm/helper.c | 22 -- > 1 file changed, 16 insertio

[PATCH v3 3/7] target/arm: Honor the HCR_EL2.TSW bit

2020-02-18 Thread Richard Henderson
These bits trap EL1 access to set/way cache maintenance insns. Buglink: https://bugs.launchpad.net/bugs/1863685 Signed-off-by: Richard Henderson --- target/arm/helper.c | 22 -- 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/target/arm/helper.c b/target/arm/he