On Fri, Oct 18, 2024 at 08:55:35AM +0100, Daniel P. Berrangé wrote:
> Date: Fri, 18 Oct 2024 08:55:35 +0100
> From: "Daniel P. Berrangé"
> Subject: Re: [PATCH v3 1/7] hw/core: Make CPU topology enumeration
> arch-agnostic
>
> On Fri, Oct 18, 2024 at 10:36:30AM +
On Fri, Oct 18, 2024 at 10:36:30AM +0800, Zhao Liu wrote:
> Hi Daniel,
>
> > > -/*
> > > - * CPUTopoLevel is the general i386 topology hierarchical representation,
> > > - * ordered by increasing hierarchical relationship.
> > > - * Its enumeration value is not bound to the type value of Intel
>
Hi Marcin,
On Thu, Oct 17, 2024 at 06:19:59PM +0200, Marcin Juszkiewicz wrote:
> Date: Thu, 17 Oct 2024 18:19:59 +0200
> From: Marcin Juszkiewicz
> Subject: Re: [PATCH v3 1/7] hw/core: Make CPU topology enumeration
> arch-agnostic
>
> W dniu 12.10.2024 o 12:44, Zhao Li
Hi Daniel,
> > -/*
> > - * CPUTopoLevel is the general i386 topology hierarchical representation,
> > - * ordered by increasing hierarchical relationship.
> > - * Its enumeration value is not bound to the type value of Intel
> > (CPUID[0x1F])
> > - * or AMD (CPUID[0x8026]).
> > - */
> > -enum
W dniu 12.10.2024 o 12:44, Zhao Liu pisze:
Cache topology needs to be defined based on CPU topology levels. Thus,
define CPU topology enumeration in qapi/machine.json to make it generic
for all architectures.
I have a question: how to create other than default cache topology in C
source?
If
On Sat, Oct 12, 2024 at 06:44:23PM +0800, Zhao Liu wrote:
> Cache topology needs to be defined based on CPU topology levels. Thus,
> define CPU topology enumeration in qapi/machine.json to make it generic
> for all architectures.
>
> To match the general topology naming style, rename CPU_TOPO_LEVE
(Ping Markus)
> > > +
> > > +##
> > > +# @CpuTopologyLevel:
> > > +#
> > > +# An enumeration of CPU topology levels.
> > > +#
> > > +# @invalid: Invalid topology level.
> >
> > Really trivial but why a capital I on Invalid here but not the
> > t of thread below?
Oops, thank you! It should be "
RESEND (sorry for noise).
Quotes in email address issue meant the server bounced it.
On Thu, 17 Oct 2024 09:52:27 +0100
Jonathan Cameron wrote:
> On Sat, 12 Oct 2024 18:44:23 +0800
> Zhao Liu wrote:
>
> > Cache topology needs to be defined based on CPU topology levels. Thus,
> > define CPU top
Cache topology needs to be defined based on CPU topology levels. Thus,
define CPU topology enumeration in qapi/machine.json to make it generic
for all architectures.
To match the general topology naming style, rename CPU_TOPO_LEVEL_* to
CPU_TOPOLOGY_LEVEL_*, and rename SMT and package levels to th
