ery
,Joel Stanley ,"open list:ASPEED BMCs"
,qemu-sta...@nongnu.org
Subject: Re: [PATCH v3 1/3] hw/i2c/aspeed: Fix Tx count and Rx size error in
buffer pool mode>On 8/12/23 08:52, Hang Yu wrote:
Fixed inconsistency between the regisiter bit field definition header file
and the ast2600
ist:ASPEED BMCs"
,qemu-sta...@nongnu.org
Subject: Re: [PATCH v3 1/3] hw/i2c/aspeed: Fix Tx count and Rx size error in
buffer pool mode>On 8/12/23 08:52, Hang Yu wrote:
>> Fixed inconsistency between the regisiter bit field definition header file
>> and the ast2600 datasheet. The reg
On 8/12/23 08:52, Hang Yu wrote:
Fixed inconsistency between the regisiter bit field definition header file
and the ast2600 datasheet. The reg name is I2CD1C:Pool Buffer Control
Register in old register mode and I2CC0C: Master/Slave Pool Buffer Control
Register in new register mode. They share b
Fixed inconsistency between the regisiter bit field definition header file
and the ast2600 datasheet. The reg name is I2CD1C:Pool Buffer Control
Register in old register mode and I2CC0C: Master/Slave Pool Buffer Control
Register in new register mode. They share bit field
[12:8]:Transmit Data Byte
