Re: [PATCH v3 1/2] target/loongarch: Adjust the layout of hardware flags bit fields

2022-11-04 Thread Richard Henderson
On 11/4/22 15:05, Rui Wang wrote: static bool check_plv(DisasContext *ctx) { -if (ctx->base.tb->flags == MMU_USER_IDX) { +if (ctx->mem_idx == MMU_USER_IDX) { Not quite. This needs to check HW_FLAGS_PLV_MASK, not the mem_idx. That was the intent of keeping them separate in HW_FLAG

[PATCH v3 1/2] target/loongarch: Adjust the layout of hardware flags bit fields

2022-11-03 Thread Rui Wang
Suggested-by: Richard Henderson Reviewed-by: Song Gao Signed-off-by: Rui Wang --- target/loongarch/cpu.h | 9 - target/loongarch/insn_trans/trans_privileged.c.inc | 2 +- target/loongarch/translate.c | 6 +- 3 files changed, 14 inser