Re: [PATCH v3 07/16] hw/sd: Add Cadence SDHCI emulation

2020-09-04 Thread Alistair Francis
On Mon, Aug 31, 2020 at 6:45 PM Bin Meng wrote: > > From: Bin Meng > > Cadence SD/SDIO/eMMC Host Controller (SD4HC) is an SDHCI compatible > controller. The SDHCI compatible registers start from offset 0x200, > which are called Slot Register Set (SRS) in its datasheet. > > This creates a Cadence

[PATCH v3 07/16] hw/sd: Add Cadence SDHCI emulation

2020-08-31 Thread Bin Meng
From: Bin Meng Cadence SD/SDIO/eMMC Host Controller (SD4HC) is an SDHCI compatible controller. The SDHCI compatible registers start from offset 0x200, which are called Slot Register Set (SRS) in its datasheet. This creates a Cadence SDHCI model built on top of the existing generic SDHCI model. C