subject:"\[PATCH v3\] target\/riscv\: pmp\: Ignore writes when RW=01"

Re: [PATCH v3] target/riscv: pmp: Ignore writes when RW=01

2023-10-22 Thread Alistair Francis

On Thu, Oct 19, 2023 at 4:57 PM Mayuresh Chitale wrote: > > As per the Priv spec: "The R, W, and X fields form a collective WARL > field for which the combinations with R=0 and W=1 are reserved." > However currently such writes are not ignored as ought to be. The > combinations with RW=01 are allo

[PATCH v3] target/riscv: pmp: Ignore writes when RW=01

2023-10-18 Thread Mayuresh Chitale

As per the Priv spec: "The R, W, and X fields form a collective WARL field for which the combinations with R=0 and W=1 are reserved." However currently such writes are not ignored as ought to be. The combinations with RW=01 are allowed only when the Smepmp extension is enabled and mseccfg.MML is se