Re: [PATCH v2 52/54] tcg/riscv: Simplify constraints on qemu_ld/st

2023-04-12 Thread Daniel Henrique Barboza
On 4/10/23 22:05, Richard Henderson wrote: The softmmu tlb uses TCG_REG_TMP[0-2], not any of the normally available registers. Now that we handle overlap betwen inputs and helper arguments, we can allow any allocatable reg. Signed-off-by: Richard Henderson --- Reviewed-by: Daniel Henrique

[PATCH v2 52/54] tcg/riscv: Simplify constraints on qemu_ld/st

2023-04-10 Thread Richard Henderson
The softmmu tlb uses TCG_REG_TMP[0-2], not any of the normally available registers. Now that we handle overlap betwen inputs and helper arguments, we can allow any allocatable reg. Signed-off-by: Richard Henderson --- tcg/riscv/tcg-target-con-set.h | 2 -- tcg/riscv/tcg-target-con-str.h | 1 -