Re: [PATCH v2 5/8] target/riscv: Add Smdbltrp CSRs handling

2024-10-11 Thread Clément Léger
On 11/10/2024 05:30, Alistair Francis wrote: > On Wed, Sep 25, 2024 at 10:02 PM Clément Léger wrote: >> >> Add `ext_smdbltrp`in RISCVCPUConfig and implement MSTATUS.MDT behavior. >> >> Signed-off-by: Clément Léger >> --- >> target/riscv/cpu_bits.h | 1 + >> target/riscv/cpu_cfg.h | 1 + >>

Re: [PATCH v2 5/8] target/riscv: Add Smdbltrp CSRs handling

2024-10-10 Thread Alistair Francis
On Wed, Sep 25, 2024 at 10:02 PM Clément Léger wrote: > > Add `ext_smdbltrp`in RISCVCPUConfig and implement MSTATUS.MDT behavior. > > Signed-off-by: Clément Léger > --- > target/riscv/cpu_bits.h | 1 + > target/riscv/cpu_cfg.h | 1 + > target/riscv/csr.c | 15 +++ > 3 files c

[PATCH v2 5/8] target/riscv: Add Smdbltrp CSRs handling

2024-09-25 Thread Clément Léger
Add `ext_smdbltrp`in RISCVCPUConfig and implement MSTATUS.MDT behavior. Signed-off-by: Clément Léger --- target/riscv/cpu_bits.h | 1 + target/riscv/cpu_cfg.h | 1 + target/riscv/csr.c | 15 +++ 3 files changed, 17 insertions(+) diff --git a/target/riscv/cpu_bits.h b/target/