On 8/26/21 6:31 AM, Peter Maydell wrote:
+si_signo = TARGET_SIGSEGV;
+si_code = TARGET_SEGV_ACCERR;
+break;
+case 0x5: /* Translation fault, level 1 */
+case 0x7: /* Translation fault, level 2 */
+si_signo = T
On 8/26/21 3:31 PM, Peter Maydell wrote:
Side note: for cases like this where we can tell MAPERR from
ACCERR based on info the exception handler passes to us, should
we prefer that or the "check the page flags" approach that
force_sigsegv_for_addr() takes ? I feel like the former is
nicer, becau
On Sat, 21 Aug 2021 at 21:03, Richard Henderson
wrote:
>
> Pull the fault information from where we placed it, in
> arm_cpu_tlb_fill and arm_cpu_do_unaligned_access.
>
> Signed-off-by: Richard Henderson
> ---
> Pulled out from the larger unaligned data patch set.
> For short-form FSC, pc misalign
Pull the fault information from where we placed it, in
arm_cpu_tlb_fill and arm_cpu_do_unaligned_access.
Signed-off-by: Richard Henderson
---
Pulled out from the larger unaligned data patch set.
For short-form FSC, pc misalignment is reported in the same way.
---
linux-user/arm/cpu_loop.c | 39 +
