subject:"\[PATCH v2 4\/6\] hw\/misc\: Microchip's 25CSM04 SEEPROM model"

Re: [PATCH v2 4/6] hw/misc: Microchip's 25CSM04 SEEPROM model

2024-04-22 Thread Cédric Le Goater

Hello Chalapathi On 4/9/24 19:56, Chalapathi V wrote: This commit implements a Serial EEPROM utilizing the Serial Peripheral Interface (SPI) compatible bus. Currently implemented SEEPROM is Microchip's 25CSM04 which provides 4 Mbits of Serial EEPROM utilizing the Serial Peripheral Interface (SPI

[PATCH v2 4/6] hw/misc: Microchip's 25CSM04 SEEPROM model

2024-04-09 Thread Chalapathi V

This commit implements a Serial EEPROM utilizing the Serial Peripheral Interface (SPI) compatible bus. Currently implemented SEEPROM is Microchip's 25CSM04 which provides 4 Mbits of Serial EEPROM utilizing the Serial Peripheral Interface (SPI) compatible bus. The device is organized as 524288 bytes