On 9/26/22 07:24, Paolo Bonzini wrote:
On Sat, Sep 24, 2022 at 10:43 PM Richard Henderson
wrote:
+static void decode_0F79(DisasContext *s, CPUX86State *env, X86OpEntry *entry,
uint8_t *b)
+{
+if (s->prefix & PREFIX_REPNZ) {
+entry->gen = gen_INSERTQ_r;
+} else if (s->prefix & P
On Sat, Sep 24, 2022 at 10:43 PM Richard Henderson
wrote:
> > +static void decode_0F79(DisasContext *s, CPUX86State *env, X86OpEntry
> > *entry, uint8_t *b)
> > +{
> > +if (s->prefix & PREFIX_REPNZ) {
> > +entry->gen = gen_INSERTQ_r;
> > +} else if (s->prefix & PREFIX_DATA) {
> >
On 9/20/22 17:24, Paolo Bonzini wrote:
+static void decode_0F78(DisasContext *s, CPUX86State *env, X86OpEntry *entry,
uint8_t *b)
+{
+static const X86OpEntry opcodes_0F78[4] = {
+{},
+X86_OP_ENTRY3(EXTRQ_i, V,x, None,None, I,w, cpuid(SSE4A)),
+{},
+X86_
These are a mixed batch, including the first two horizontal
(66 and F2 only) operations, more moves, and SSE4a extract/insert.
Because SSE4a is pretty rare, I chose to leave the helper as they are,
but it is possible to unify them by loading index and length from the
source XMM register and genera
