Re: [PATCH v2 2/6] target/riscv: Check for async flag in case of RISCV_EXCP_SEMIHOST.

2023-06-01 Thread Alistair Francis
On Sat, May 27, 2023 at 2:24 AM Rajnesh Kanwal wrote: > > RISCV_EXCP_SEMIHOST is set to 0x10, which can be a local interrupt id > as well. This change moves RISCV_EXCP_SEMIHOST to switch case so that > async flag check is performed before invoking semihosting logic. > > Signed-off-by: Rajnesh Kanw

[PATCH v2 2/6] target/riscv: Check for async flag in case of RISCV_EXCP_SEMIHOST.

2023-05-26 Thread Rajnesh Kanwal
RISCV_EXCP_SEMIHOST is set to 0x10, which can be a local interrupt id as well. This change moves RISCV_EXCP_SEMIHOST to switch case so that async flag check is performed before invoking semihosting logic. Signed-off-by: Rajnesh Kanwal --- target/riscv/cpu_helper.c | 10 -- 1 file changed