Re: [PATCH v2 2/2] intel_iommu: TM field should not be in reserved bits

2019-11-19 Thread Michael S. Tsirkin
On Tue, Nov 19, 2019 at 08:28:14PM +0800, qi1.zh...@intel.com wrote: > From: "Zhang, Qi" > > When dt is supported, TM field should not be Reserved(0). > > Refer to VT-d Spec 9.8 > > Signed-off-by: Zhang, Qi > Signed-off-by: Qi, Yadong OK and we want to CC stable on this I guess? > --- > hw

[PATCH v2 2/2] intel_iommu: TM field should not be in reserved bits

2019-11-18 Thread qi1 . zhang
From: "Zhang, Qi" When dt is supported, TM field should not be Reserved(0). Refer to VT-d Spec 9.8 Signed-off-by: Zhang, Qi Signed-off-by: Qi, Yadong --- hw/i386/intel_iommu.c | 12 hw/i386/intel_iommu_internal.h | 17 + 2 files changed, 21 insertions(+)