Re: [PATCH v2 15/21] target/riscv: Reorg csr instructions

On Wed, Aug 18, 2021 at 5:27 AM Richard Henderson wrote: > > Introduce csrr and csrw helpers, for read-only and write-only insns. > > Note that we do not properly implement this in riscv_csrrw, in that > we cannot distinguish true read-only (rs1 == 0) from any other zero > write_mask another sourc

[PATCH v2 15/21] target/riscv: Reorg csr instructions

Introduce csrr and csrw helpers, for read-only and write-only insns. Note that we do not properly implement this in riscv_csrrw, in that we cannot distinguish true read-only (rs1 == 0) from any other zero write_mask another source register -- this should still raise an exception for read-only regi