Hello!
Thanks everyone for your kind reviews
On 11/05/2022 07:12, Rashmica Gupta wrote:
Hello,
cc'ing Paul and Nick for clarification on the behaviour of xsrsp (see below)
On Tue, 2022-05-10 at 17:46 -0300, Víctor Colombo wrote:
The FI bit in FPSCR is said to be a non-sticky bit on Power IS
Hello,
cc'ing Paul and Nick for clarification on the behaviour of xsrsp (see below)
On Tue, 2022-05-10 at 17:46 -0300, Víctor Colombo wrote:
> The FI bit in FPSCR is said to be a non-sticky bit on Power ISA.
> One could think this means that, if an instruction is said to modify
> the FPSCR regis
On 5/10/22 13:46, Víctor Colombo wrote:
The FI bit in FPSCR is said to be a non-sticky bit on Power ISA.
One could think this means that, if an instruction is said to modify
the FPSCR register, the bit FI should be cleared. This is what QEMU
does today.
However, the following inconsistency was f
The FI bit in FPSCR is said to be a non-sticky bit on Power ISA.
One could think this means that, if an instruction is said to modify
the FPSCR register, the bit FI should be cleared. This is what QEMU
does today.
However, the following inconsistency was found when comparing results
from the hardw
