subject:"\[PATCH v2 05\/37\] target\/riscv\: SIMD 16\-bit Shift Instructions"

Re: [PATCH v2 05/37] target/riscv: SIMD 16-bit Shift Instructions

2021-06-10 Thread Richard Henderson

On 6/10/21 12:58 AM, LIU Zhiwei wrote: include/tcg/tcg-op-gvec.h | 9 ++ tcg/tcg-op-gvec.c | 28 +++ Again, should be split out, with a Reviewed-by: Richard Henderson r~

[PATCH v2 05/37] target/riscv: SIMD 16-bit Shift Instructions

2021-06-10 Thread LIU Zhiwei

Instructions include right arithmetic shift, right logic shift, and left shift. The shift can be an immediate or a register scalar. The right shift has rounding operation. And the left shift has saturation operation. Signed-off-by: LIU Zhiwei --- include/tcg/tcg-op-gvec.h | 9 ++