Re: [PATCH v2 05/14] tcg/riscv: Implement vector load/store

On 8/30/24 16:15, LIU Zhiwei wrote: @@ -799,6 +834,17 @@ static void tcg_out_ldst(TCGContext *s, RISCVInsn opc, TCGReg data, case OPC_SD: tcg_out_opc_store(s, opc, addr, data, imm12); break; +case OPC_VSE8_V: +case OPC_VSE16_V: +case OPC_VSE32_V: +case O

[PATCH v2 05/14] tcg/riscv: Implement vector load/store

From: TANG Tiancheng Signed-off-by: TANG Tiancheng Reviewed-by: Liu Zhiwei --- tcg/riscv/tcg-target-con-set.h | 2 + tcg/riscv/tcg-target.c.inc | 169 - 2 files changed, 167 insertions(+), 4 deletions(-) diff --git a/tcg/riscv/tcg-target-con-set.h b/tcg/r