Re: [PATCH v2 04/22] hw/iommu: introduce HostIOMMUContext

2020-04-06 Thread Auger Eric
Hi Yi, On 4/6/20 10:04 AM, Liu, Yi L wrote: > Hi Eric, > >> From: Auger Eric < eric.au...@redhat.com> >> Sent: Tuesday, March 31, 2020 1:23 AM >> To: Liu, Yi L ; qemu-devel@nongnu.org; >> Subject: Re: [PATCH v2 04/22] hw/iommu: introduce HostIOMMUContext >

RE: [PATCH v2 04/22] hw/iommu: introduce HostIOMMUContext

2020-04-06 Thread Liu, Yi L
Hi Eric, > From: Auger Eric < eric.au...@redhat.com> > Sent: Tuesday, March 31, 2020 1:23 AM > To: Liu, Yi L ; qemu-devel@nongnu.org; > Subject: Re: [PATCH v2 04/22] hw/iommu: introduce HostIOMMUContext > > Yi, > > On 3/30/20 6:24 AM, Liu Yi L wrote: > > Curr

RE: [PATCH v2 04/22] hw/iommu: introduce HostIOMMUContext

2020-03-31 Thread Liu, Yi L
Hi Eric, > From: Auger Eric > Sent: Tuesday, March 31, 2020 3:48 PM > To: Liu, Yi L ; qemu-devel@nongnu.org; > Subject: Re: [PATCH v2 04/22] hw/iommu: introduce HostIOMMUContext > > Yi, > > On 3/31/20 6:10 AM, Liu, Yi L wrote: > > Hi Eric, > > > >

Re: [PATCH v2 04/22] hw/iommu: introduce HostIOMMUContext

2020-03-31 Thread Auger Eric
Yi, On 3/31/20 6:10 AM, Liu, Yi L wrote: > Hi Eric, > >> From: Auger Eric < eric.au...@redhat.com > >> Sent: Tuesday, March 31, 2020 1:23 AM >> To: Liu, Yi L ; qemu-devel@nongnu.org; >> Subject: Re: [PATCH v2 04/22] hw/iommu: introduce HostIOMMUContext >&g

RE: [PATCH v2 04/22] hw/iommu: introduce HostIOMMUContext

2020-03-30 Thread Liu, Yi L
Hi Eric, > From: Auger Eric < eric.au...@redhat.com > > Sent: Tuesday, March 31, 2020 1:23 AM > To: Liu, Yi L ; qemu-devel@nongnu.org; > Subject: Re: [PATCH v2 04/22] hw/iommu: introduce HostIOMMUContext > > Yi, > > On 3/30/20 6:24 AM, Liu Yi L wrote: > &

Re: [PATCH v2 04/22] hw/iommu: introduce HostIOMMUContext

2020-03-30 Thread Auger Eric
Yi, On 3/30/20 6:24 AM, Liu Yi L wrote: > Currently, many platform vendors provide the capability of dual stage > DMA address translation in hardware. For example, nested translation > on Intel VT-d scalable mode, nested stage translation on ARM SMMUv3, > and etc. In dual stage DMA address transla

[PATCH v2 04/22] hw/iommu: introduce HostIOMMUContext

2020-03-29 Thread Liu Yi L
Currently, many platform vendors provide the capability of dual stage DMA address translation in hardware. For example, nested translation on Intel VT-d scalable mode, nested stage translation on ARM SMMUv3, and etc. In dual stage DMA address translation, there are two stages address translation, s