Re: [PATCH v2 03/14] tcg/riscv: Add basic support for vector

On 8/30/24 16:15, LIU Zhiwei wrote: From: Swung0x48 The RISC-V vector instruction set utilizes the LMUL field to group multiple registers, enabling variable-length vector registers. This implementation uses only the first register number of each group while reserving the other register numbers

[PATCH v2 03/14] tcg/riscv: Add basic support for vector

From: Swung0x48 The RISC-V vector instruction set utilizes the LMUL field to group multiple registers, enabling variable-length vector registers. This implementation uses only the first register number of each group while reserving the other register numbers within the group. In TCG, each VEC_IR