Re: [PATCH v2 01/19] tcg: Enhance flush_icache_range with separate data pointer

2020-11-03 Thread Richard Henderson
On 10/31/20 11:54 PM, Joelle van Dyne wrote: > s->code_ptr and s->code_buf are 4 byte pointers on aarch64 so the > cache flush is off by a factor of 4 > > diff --git a/tcg/tcg.c b/tcg/tcg.c > index 44b923f5fe..2c4b66965b 100644 > --- a/tcg/tcg.c > +++ b/tcg/tcg.c > @@ -4325,7 +4325,8 @@ int tcg_ge

Re: [PATCH v2 01/19] tcg: Enhance flush_icache_range with separate data pointer

2020-10-31 Thread Joelle van Dyne
s->code_ptr and s->code_buf are 4 byte pointers on aarch64 so the cache flush is off by a factor of 4 diff --git a/tcg/tcg.c b/tcg/tcg.c index 44b923f5fe..2c4b66965b 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -4325,7 +4325,8 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb) /* flush in

[PATCH v2 01/19] tcg: Enhance flush_icache_range with separate data pointer

2020-10-29 Thread Richard Henderson
We are shortly going to have a split rw/rx jit buffer. Depending on the host, we need to flush the dcache at the rw data pointer and flush the icache at the rx code pointer. For now, the two passed pointers are identical, so there is no effective change in behaviour. Signed-off-by: Richard Hende