On 20/11/22 16:05, Bernhard Beschow wrote:
Bernhard Beschow (3):
hw/pci/pci: Factor out pci_bus_map_irqs() from pci_bus_irqs()
hw/isa/piix3: Decouple INTx-to-LNKx routing which is board-specific
hw/isa/piix4: Decouple INTx-to-LNKx routing which is board-specific
Thanks, series queued
On Tue, Dec 20, 2022 at 11:26:42PM +, Bernhard Beschow wrote:
>
>
> Am 20. Dezember 2022 23:10:45 UTC schrieb "Michael S. Tsirkin"
> :
> >On Sun, Dec 18, 2022 at 10:21:49AM +, Bernhard Beschow wrote:
> >>
> >>
> >> Am 9. Dezember 2022 15:23:59 UTC schrieb "Philippe Mathieu-Daudé"
> >>
On Sun, Nov 20, 2022 at 04:05:47PM +0100, Bernhard Beschow wrote:
> v1:
> ===
>
> During my PIIX consolidation work [1] I've noticed that both PIIX models have
> quite different pci_slot_get_pirq() implementations. These functions seem to
> map PCI INTx pins to input pins of a programmable interru
Am 20. Dezember 2022 23:10:45 UTC schrieb "Michael S. Tsirkin"
:
>On Sun, Dec 18, 2022 at 10:21:49AM +, Bernhard Beschow wrote:
>>
>>
>> Am 9. Dezember 2022 15:23:59 UTC schrieb "Philippe Mathieu-Daudé"
>> :
>> >On 20/11/22 16:05, Bernhard Beschow wrote:
>> >> v1:
>> >> ===
>> >>
>> >>
On Sun, Dec 18, 2022 at 10:21:49AM +, Bernhard Beschow wrote:
>
>
> Am 9. Dezember 2022 15:23:59 UTC schrieb "Philippe Mathieu-Daudé"
> :
> >On 20/11/22 16:05, Bernhard Beschow wrote:
> >> v1:
> >> ===
> >>
> >> During my PIIX consolidation work [1] I've noticed that both PIIX models
> >>
On Sun, Dec 18, 2022 at 10:21:49AM +, Bernhard Beschow wrote:
>
>
> Am 9. Dezember 2022 15:23:59 UTC schrieb "Philippe Mathieu-Daudé"
> :
> >On 20/11/22 16:05, Bernhard Beschow wrote:
> >> v1:
> >> ===
> >>
> >> During my PIIX consolidation work [1] I've noticed that both PIIX models
> >>
Am 9. Dezember 2022 15:23:59 UTC schrieb "Philippe Mathieu-Daudé"
:
>On 20/11/22 16:05, Bernhard Beschow wrote:
>> v1:
>> ===
>>
>> During my PIIX consolidation work [1] I've noticed that both PIIX models have
>> quite different pci_slot_get_pirq() implementations. These functions seem to
>> m
On 20/11/22 16:05, Bernhard Beschow wrote:
v1:
===
During my PIIX consolidation work [1] I've noticed that both PIIX models have
quite different pci_slot_get_pirq() implementations. These functions seem to
map PCI INTx pins to input pins of a programmable interrupt router which is
AFAIU board-sp
v1:
===
During my PIIX consolidation work [1] I've noticed that both PIIX models have
quite different pci_slot_get_pirq() implementations. These functions seem to
map PCI INTx pins to input pins of a programmable interrupt router which is
AFAIU board-specific. IOW, board-specific assumptions are b