Re: [PATCH v2] hw/char/pl011: Enable TxFIFO and async transmission

2020-03-08 Thread Gavin Shan
On 3/6/20 10:15 PM, Marc-André Lureau wrote: On Mon, Feb 24, 2020 at 4:13 AM Gavin Shan wrote: The depth of TxFIFO can be 1 or 16 depending on LCR[4]. The TxFIFO is disabled when its depth is 1. It's nice to have TxFIFO enabled if possible because more characters can be piled and transmitted

Re: [PATCH v2] hw/char/pl011: Enable TxFIFO and async transmission

2020-03-06 Thread Marc-André Lureau
Hi On Mon, Feb 24, 2020 at 4:13 AM Gavin Shan wrote: > > The depth of TxFIFO can be 1 or 16 depending on LCR[4]. The TxFIFO is > disabled when its depth is 1. It's nice to have TxFIFO enabled if > possible because more characters can be piled and transmitted at once, > which would have less overh

Re: [PATCH v2] hw/char/pl011: Enable TxFIFO and async transmission

2020-03-04 Thread Gavin Shan
On 2/24/20 2:13 PM, Gavin Shan wrote: The depth of TxFIFO can be 1 or 16 depending on LCR[4]. The TxFIFO is disabled when its depth is 1. It's nice to have TxFIFO enabled if possible because more characters can be piled and transmitted at once, which would have less overhead. Besides, we can be b

[PATCH v2] hw/char/pl011: Enable TxFIFO and async transmission

2020-02-23 Thread Gavin Shan
The depth of TxFIFO can be 1 or 16 depending on LCR[4]. The TxFIFO is disabled when its depth is 1. It's nice to have TxFIFO enabled if possible because more characters can be piled and transmitted at once, which would have less overhead. Besides, we can be blocked because of qemu_chr_fe_write_all(