On Thu, 5 Jun 2025 17:44:52 +0800
Zhao Liu wrote:
> Hi Ali,
>
> I'm very sorry to bother you with some comments after so many
> versions.
>
> > diff --git a/hw/cpu/core.c b/hw/cpu/core.c
> > index 5cb2e9a7f5..7339782663 100644
> > --- a/hw/cpu/core.c
> > +++ b/hw/cpu/core.c
>
> core.c is not
> Hi Zhao,
>
> Thanks for the feedback, I was actually unsure about the structure, and
> was looking to get some feedback here, to see where to put what! I
> will go over the suggestions, and take note. In the meantime, let's see
> if we can get some more review here.
Sure! BTW, it's better to sp
On Thu, 5 Jun 2025 17:44:52 +0800
Zhao Liu wrote:
> Hi Ali,
>
> I'm very sorry to bother you with some comments after so many
> versions.
>
> > diff --git a/hw/cpu/core.c b/hw/cpu/core.c
> > index 5cb2e9a7f5..7339782663 100644
> > --- a/hw/cpu/core.c
> > +++ b/hw/cpu/core.c
>
> core.c is not
Hi Ali,
I'm very sorry to bother you with some comments after so many versions.
> diff --git a/hw/cpu/core.c b/hw/cpu/core.c
> index 5cb2e9a7f5..7339782663 100644
> --- a/hw/cpu/core.c
> +++ b/hw/cpu/core.c
core.c is not the right place. It just contains the "cpu-core"
abstraction. So we need to
Specify which layer (core/cluster/socket) caches found at in the CPU
topology. Updating cache topology to device tree (spec v0.4).
Example:
Here, 2 sockets (packages), and 2 clusters, 4 cores and 2 threads
created, in aggregate 2*2*4*2 logical cores. In the smp-cache object,
cores will have l1d an
