Re: [PATCH v10 14/23] hw/intc/arm_gicv3: Add irq non-maskable property

2024-03-30 Thread Peter Maydell
On Sat, 30 Mar 2024 at 01:42, Jinjie Ruan wrote: > > > > On 2024/3/28 22:54, Peter Maydell wrote: > > On Mon, 25 Mar 2024 at 08:52, Jinjie Ruan wrote: > >> > >> A SPI, PPI or SGI interrupt can have non-maskable property. So maintain > >> non-maskable property in PendingIrq and GICR/GICD. Since ad

Re: [PATCH v10 14/23] hw/intc/arm_gicv3: Add irq non-maskable property

2024-03-29 Thread Jinjie Ruan via
On 2024/3/28 22:54, Peter Maydell wrote: > On Mon, 25 Mar 2024 at 08:52, Jinjie Ruan wrote: >> >> A SPI, PPI or SGI interrupt can have non-maskable property. So maintain >> non-maskable property in PendingIrq and GICR/GICD. Since add new device >> state, it also needs to be migrated, so also sa

Re: [PATCH v10 14/23] hw/intc/arm_gicv3: Add irq non-maskable property

2024-03-28 Thread Peter Maydell
On Mon, 25 Mar 2024 at 08:52, Jinjie Ruan wrote: > > A SPI, PPI or SGI interrupt can have non-maskable property. So maintain > non-maskable property in PendingIrq and GICR/GICD. Since add new device > state, it also needs to be migrated, so also save NMI info in > vmstate_gicv3_cpu and vmstate_gic

[PATCH v10 14/23] hw/intc/arm_gicv3: Add irq non-maskable property

2024-03-25 Thread Jinjie Ruan via
A SPI, PPI or SGI interrupt can have non-maskable property. So maintain non-maskable property in PendingIrq and GICR/GICD. Since add new device state, it also needs to be migrated, so also save NMI info in vmstate_gicv3_cpu and vmstate_gicv3. Signed-off-by: Jinjie Ruan Acked-by: Richard Henderson