[PATCH v10 03/61] target/riscv: support vector extension csr

2020-06-19 Thread LIU Zhiwei
The v0.7.1 specification does not define vector status within mstatus. A future revision will define the privileged portion of the vector status. Signed-off-by: LIU Zhiwei Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson --- target/riscv/cpu_bits.h | 15 + target/riscv/csr.

[PATCH v10 03/61] target/riscv: support vector extension csr

2020-06-19 Thread LIU Zhiwei
The v0.7.1 specification does not define vector status within mstatus. A future revision will define the privileged portion of the vector status. Signed-off-by: LIU Zhiwei Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson --- target/riscv/cpu_bits.h | 15 + target/riscv/csr.