On Fri, 15 Sep 2023 16:48:41 +0200
Igor Mammedov wrote:
> On Fri, 15 Sep 2023 15:25:09 +0100
> Jonathan Cameron via wrote:
>
> > On Thu, 14 Sep 2023 19:45:56 -0700
> > wrote:
> >
> > > From: Ankit Agrawal
> > >
> > > The CPU cache coherent device memory can be added as a set of
> > > NUMA
> Also, good to say why multiple nodes per device are needed.
This is to support the GPU's MIG (Mult-Instance GPUs) feature,
(https://www.nvidia.com/en-in/technologies/multi-instance-gpu/) which
allows partitioning of the GPU device resources (including device memory) into
several isolated instance
On Fri, 15 Sep 2023 15:25:09 +0100
Jonathan Cameron via wrote:
> On Thu, 14 Sep 2023 19:45:56 -0700
> wrote:
>
> > From: Ankit Agrawal
> >
> > The CPU cache coherent device memory can be added as a set of
> > NUMA nodes distinct from the system memory nodes. The Qemu currently
> > do not prov
On Thu, 14 Sep 2023 19:45:56 -0700
wrote:
> From: Ankit Agrawal
>
> The CPU cache coherent device memory can be added as a set of
> NUMA nodes distinct from the system memory nodes. The Qemu currently
> do not provide a mechanism to support node creation for a vfio-pci
> device.
>
> Introduce
From: Ankit Agrawal
The CPU cache coherent device memory can be added as a set of
NUMA nodes distinct from the system memory nodes. The Qemu currently
do not provide a mechanism to support node creation for a vfio-pci
device.
Introduce new command line parameters to allow host admin provide
the