On Tue, Sep 29, 2020 at 02:28:48AM +, Kang, Luwei wrote:
> > > > No, it's not possible. KVM doesn't have a say on what the
> > > > processor writes in the tracing packets.
> > > > >>> Can KVM refuse to enable packet generation if CSbase is not zero
> > > > >>> and CPUID.(EAX=14H,ECX=
> >> No, if a feature cannot be emulated, that means it cannot be enabled
> >> unless it matches the host. That's generally not a problem since
> >> Intel PT is usually used only with "-cpu host".
> >>
> > The limitation of LIP in qemu will mask off the Intel PT in KVM guest
> > even with "-cpu ho
> > > No, it's not possible. KVM doesn't have a say on what the
> > > processor writes in the tracing packets.
> > > >>> Can KVM refuse to enable packet generation if CSbase is not zero
> > > >>> and CPUID.(EAX=14H,ECX=0)[bit 31] seen by guest is different from
> host?
> > > >>
> > > >>
On 28/09/20 14:42, Kang, Luwei wrote:
>> No, if a feature cannot be emulated, that means it cannot be
>> enabled unless it matches the host. That's generally not a problem
>> since Intel PT is usually used only with "-cpu host".
>>
> The limitation of LIP in qemu will mask off the Intel PT in KVM
On Mon, Sep 28, 2020 at 12:42:37PM +, Kang, Luwei wrote:
> > No, it's not possible. KVM doesn't have a say on what the
> > processor writes in the tracing packets.
> > >>> Can KVM refuse to enable packet generation if CSbase is not zero and
> > >>> CPUID.(EAX=14H,ECX=0)[bit 31] seen
> No, it's not possible. KVM doesn't have a say on what the
> processor writes in the tracing packets.
> >>> Can KVM refuse to enable packet generation if CSbase is not zero and
> >>> CPUID.(EAX=14H,ECX=0)[bit 31] seen by guest is different from host?
> >>
> >> Yes, but the processor cou
On 28/09/20 07:19, Kang, Luwei wrote:
No, it's not possible. KVM doesn't have a say on what the processor
writes in the tracing packets.
>>> Can KVM refuse to enable packet generation if CSbase is not zero and
>>> CPUID.(EAX=14H,ECX=0)[bit 31] seen by guest is different from host?
>>
>>
> >> No, it's not possible. KVM doesn't have a say on what the processor
> >> writes in the tracing packets.
> > Can KVM refuse to enable packet generation if CSbase is not zero and
> > CPUID.(EAX=14H,ECX=0)[bit 31] seen by guest is different from host?
>
> Yes, but the processor could change ope
On 25/09/20 22:29, Eduardo Habkost wrote:
>> No, it's not possible. KVM doesn't have a say on what the processor
>> writes in the tracing packets.
> Can KVM refuse to enable packet generation if CSbase is not zero
> and CPUID.(EAX=14H,ECX=0)[bit 31] seen by guest is different from
> host?
Yes, bu
On Fri, Sep 25, 2020 at 10:23:49PM +0200, Paolo Bonzini wrote:
> On 25/09/20 18:54, Eduardo Habkost wrote:
> > On Fri, Sep 25, 2020 at 04:42:26PM +, Strong, Beeman wrote:
> >> LIP=0 will differ from LIP=1 behavior only when CSbase is non-zero, which
> >> requires 32-bit code. In that case a L
On 25/09/20 18:54, Eduardo Habkost wrote:
> On Fri, Sep 25, 2020 at 04:42:26PM +, Strong, Beeman wrote:
>> LIP=0 will differ from LIP=1 behavior only when CSbase is non-zero, which
>> requires 32-bit code. In that case a LIP=0 implementation will provide only
>> the EIP offset from CSbase in
).
-Original Message-
From: Eduardo Habkost
Sent: Friday, September 25, 2020 9:16 AM
To: Kang, Luwei
Cc: pbonz...@redhat.com; r...@twiddle.net; qemu-devel@nongnu.org; Strong,
Beeman
Subject: Re: [PATCH v1 1/3] i386: Remove the limitation of IP payloads for
Intel PT
On Tue, Feb 25, 2020 at 05:38
o: Kang, Luwei
> Cc: pbonz...@redhat.com; r...@twiddle.net; qemu-devel@nongnu.org; Strong,
> Beeman
> Subject: Re: [PATCH v1 1/3] i386: Remove the limitation of IP payloads for
> Intel PT
>
> On Tue, Feb 25, 2020 at 05:38:30AM +0800, Luwei Kang wrote:
> > The Intel PT pac
On Tue, Feb 25, 2020 at 05:38:30AM +0800, Luwei Kang wrote:
> The Intel PT packets which contain IP payloads will have LIP values, and it
> will include the CS base component if the CPUID.(EAX=14H,ECX=0H).ECX.[bit31]
> is set. But it will disabled the Intel PT in kvm guest because of the need
> of
The Intel PT packets which contain IP payloads will have LIP values, and it
will include the CS base component if the CPUID.(EAX=14H,ECX=0H).ECX.[bit31]
is set. But it will disabled the Intel PT in kvm guest because of the need
of live migration safe(c078ca9 i386: Disable Intel PT if packets IP pay
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