Re: [PATCH for-8.2] target/arm: Set IL bit for pauth, SVE access, BTI trap syndromes

2023-11-20 Thread Richard Henderson
On 11/20/23 07:01, Peter Maydell wrote: The syndrome register value always has an IL field at bit 25, which is 0 for a trap on a 16 bit instruction, and 1 for a trap on a 32 bit instruction (or for exceptions which aren't traps on a known instruction, like PC alignment faults). This means that ou

[PATCH for-8.2] target/arm: Set IL bit for pauth, SVE access, BTI trap syndromes

2023-11-20 Thread Peter Maydell
The syndrome register value always has an IL field at bit 25, which is 0 for a trap on a 16 bit instruction, and 1 for a trap on a 32 bit instruction (or for exceptions which aren't traps on a known instruction, like PC alignment faults). This means that our syn_*() functions should always either t