On 19/11/2019 15:04, Greg Kurz wrote:
> On Fri, 15 Nov 2019 17:24:15 +0100
> Cédric Le Goater wrote:
>
>> Each vCPU in the system is identified with an NVT identifier which is
>> pushed in the OS CAM line (QW1W2) of the HW thread interrupt context
>> register when the vCPU is dispatched on a HW t
On Fri, 15 Nov 2019 17:24:15 +0100
Cédric Le Goater wrote:
> Each vCPU in the system is identified with an NVT identifier which is
> pushed in the OS CAM line (QW1W2) of the HW thread interrupt context
> register when the vCPU is dispatched on a HW thread. This identifier
> is used by the present
On Fri, Nov 15, 2019 at 05:24:15PM +0100, Cédric Le Goater wrote:
> Each vCPU in the system is identified with an NVT identifier which is
> pushed in the OS CAM line (QW1W2) of the HW thread interrupt context
> register when the vCPU is dispatched on a HW thread. This identifier
> is used by the pr
Each vCPU in the system is identified with an NVT identifier which is
pushed in the OS CAM line (QW1W2) of the HW thread interrupt context
register when the vCPU is dispatched on a HW thread. This identifier
is used by the presenter subengine to find a matching target to notify
of an event. It is a
