On Thu, Jun 25, 2020 at 03:30:38PM +0200, Paolo Bonzini wrote:
> On 25/06/20 14:36, Roman Bolshakov wrote:
> > I don't know any alternative for PDPTE and VMCS Entry Controls in
> > CPUX86State, that's why I left explicit reset of the VMCS fields in
> > post-reset.
>
> VMCS entry controls should be
On 25/06/20 17:02, Roman Bolshakov wrote:
> macvm_set_cr0() sets/clears LMA in entry controls only in case of
> transitions into/out of long mode in enter_long_mode() in
> exit_long_mode(), respectively. But macvm_set_cr0() doesn't load
> EFER.LMA from CPUX86State into VMCS entry controls during re
On Thu, Jun 25, 2020 at 03:30:38PM +0200, Paolo Bonzini wrote:
> On 25/06/20 14:36, Roman Bolshakov wrote:
> >
> > Yes, there's such a place. post-init and post-reset invoke
> > hvf_put_registers() and the latter one calls hvf_put_segments().
> > hvf_put_segments() sets CR4 and CR0 via macvm_set_c
On 25/06/20 14:36, Roman Bolshakov wrote:
>
> Yes, there's such a place. post-init and post-reset invoke
> hvf_put_registers() and the latter one calls hvf_put_segments().
> hvf_put_segments() sets CR4 and CR0 via macvm_set_cr0/macvm_set_cr4
> using the CR0/CR4 from env. So, the reset is relying o
On Thu, Jun 25, 2020 at 12:31:49PM +0200, Paolo Bonzini wrote:
> On 25/06/20 00:58, Roman Bolshakov wrote:
> > +uint64_t pdpte[4] = {0, 0, 0, 0};
> > +int i;
> > +
> > +/* Reset IA-32e mode guest (LMA) */
> > +wvmcs(cpu->hvf_fd, VMCS_ENTRY_CTLS, 0);
> > +
>
> Where is the place (if
On 25/06/20 00:58, Roman Bolshakov wrote:
> +uint64_t pdpte[4] = {0, 0, 0, 0};
> +int i;
> +
> +/* Reset IA-32e mode guest (LMA) */
> +wvmcs(cpu->hvf_fd, VMCS_ENTRY_CTLS, 0);
> +
Where is the place (if any...) that calls macvm_set_cr0 and
macvm_set_cr4 from cpu_synchronize_*? If y
It's worth to have a custom accel-specific reset in x86_cpu_reset() only
if something related to CPUState has to be reset and that can't be done
in post-init or post-reset.
Cc: Cameron Esfahani
Signed-off-by: Roman Bolshakov
---
include/sysemu/hvf.h | 1 -
target/i386/cpu.c | 3 ---
targ