On 5/15/23 16:15, Nicholas Piggin wrote:
On Mon May 15, 2023 at 7:32 PM AEST, Harsh Prateek Bora wrote:
On 5/15/23 14:02, Harsh Prateek Bora wrote:
That would be wrong for the other HSRR fallthroughs above it.
Oh yeh, in that case, may be move it to top of the EXCP_HISI, it would
need d
On Mon May 15, 2023 at 7:32 PM AEST, Harsh Prateek Bora wrote:
>
>
> On 5/15/23 14:02, Harsh Prateek Bora wrote:
> >>
> >> That would be wrong for the other HSRR fallthroughs above it.
> >>
> > Oh yeh, in that case, may be move it to top of the EXCP_HISI, it would
> > need duplicating one line of
On 5/15/23 14:02, Harsh Prateek Bora wrote:
That would be wrong for the other HSRR fallthroughs above it.
Oh yeh, in that case, may be move it to top of the EXCP_HISI, it would
need duplicating one line of assignment though (relatively better?).
correcting myself, no duplication needed if
On 5/15/23 13:56, Nicholas Piggin wrote:
On Tue May 9, 2023 at 7:51 PM AEST, Harsh Prateek Bora wrote:
On Thu, Mar 23, 2023 at 12:22:37PM +1000, Nicholas Piggin wrote:
The hypervisor emulation assistance interrupt modifies HEIR to
contain the value of the instruction which caused the excepti
On Tue May 9, 2023 at 7:51 PM AEST, Harsh Prateek Bora wrote:
> On Thu, Mar 23, 2023 at 12:22:37PM +1000, Nicholas Piggin wrote:
> > The hypervisor emulation assistance interrupt modifies HEIR to
> > contain the value of the instruction which caused the exception.
> >
> > Signed-off-by: Nicholas P
On Thu, Mar 23, 2023 at 12:22:37PM +1000, Nicholas Piggin wrote:
> The hypervisor emulation assistance interrupt modifies HEIR to
> contain the value of the instruction which caused the exception.
>
> Signed-off-by: Nicholas Piggin
> ---
> target/ppc/cpu.h | 1 +
> target/ppc/cpu_init.c
The hypervisor emulation assistance interrupt modifies HEIR to
contain the value of the instruction which caused the exception.
Signed-off-by: Nicholas Piggin
---
target/ppc/cpu.h | 1 +
target/ppc/cpu_init.c| 23 +++
target/ppc/excp_helper.c | 12 +++-
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