subject:"\[PATCH 3\/6\] target\/riscv\: Add csr support for svadu"

Re: [PATCH 3/6] target/riscv: Add csr support for svadu

2023-02-24 Thread Daniel Henrique Barboza

On 2/24/23 01:08, Weiwei Li wrote: Add ext_svadu property Add HADE field in *envcfg: * menvcfg.HADE is read-only zero if Svadu is not implemented. * henvcfg.HADE is read-only zero if menvcfg.HADE is zero. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang --- Reviewed-by: Daniel Henriq

[PATCH 3/6] target/riscv: Add csr support for svadu

2023-02-23 Thread Weiwei Li

Add ext_svadu property Add HADE field in *envcfg: * menvcfg.HADE is read-only zero if Svadu is not implemented. * henvcfg.HADE is read-only zero if menvcfg.HADE is zero. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang --- target/riscv/cpu.h | 1 + target/riscv/cpu_bits.h | 4