Re: [PATCH 3/3] target/riscv: Update MTINST/HTINST CSR in riscv_cpu_do_interrupt()

On 8/12/20 4:16 PM, Alistair Francis wrote: > I don't like that we have to manually decode the instructions. As it's > only a handful it's not the end of the world, but it seems like > duplication that could grow. Could we not use decode_insn16() instead? > That way we can share the well tested TCG

Re: [PATCH 3/3] target/riscv: Update MTINST/HTINST CSR in riscv_cpu_do_interrupt()

On Wed, Jul 29, 2020 at 4:32 AM Anup Patel wrote: > > When RISCV_FEATURE_TINST feature is enabled, we should write > transformed instruction encoding of the trapped instruction > in MTINST/HTINST CSR at time of taking trap. > > We update riscv_cpu_do_interrupt() as-per above. > > Signed-off-by: An

[PATCH 3/3] target/riscv: Update MTINST/HTINST CSR in riscv_cpu_do_interrupt()

When RISCV_FEATURE_TINST feature is enabled, we should write transformed instruction encoding of the trapped instruction in MTINST/HTINST CSR at time of taking trap. We update riscv_cpu_do_interrupt() as-per above. Signed-off-by: Anup Patel --- target/riscv/cpu_helper.c | 166 ++