On 1/5/24 03:23, Peter Maydell wrote:
On Wed, 27 Dec 2023 at 23:55, Richard Henderson
wrote:
On 12/18/23 22:32, Peter Maydell wrote:
+if (s->nv && s->nv2 && ri->nv2_redirect_offset) {
Again, s->nv test is redundant.
Fixed, thanks.
+/*
+ * Some registers always redire
On Wed, 27 Dec 2023 at 23:55, Richard Henderson
wrote:
>
> On 12/18/23 22:32, Peter Maydell wrote:
> > +if (s->nv && s->nv2 && ri->nv2_redirect_offset) {
>
> Again, s->nv test is redundant.
Fixed, thanks.
> > +/*
> > + * Some registers always redirect to memory; some only do
On 12/18/23 22:32, Peter Maydell wrote:
+if (s->nv && s->nv2 && ri->nv2_redirect_offset) {
Again, s->nv test is redundant.
+/*
+ * Some registers always redirect to memory; some only do so if
+ * HCR_EL2.NV1 is 0, and some only if NV1 is 1 (these come in
+
FEAT_NV2 requires that when HCR_EL2.{NV,NV2} == 0b11 then accesses by
EL1 to certain system registers are redirected to RAM. The full list
of affected registers is in the table in rule R_CSRPQ in the Arm ARM.
The registers may be normally accessible at EL1 (like ACTLR_EL1), or
normally UNDEF at EL
