On Sat, 9 Apr 2022 at 20:20, Richard Henderson
wrote:
> On 4/8/22 07:15, Peter Maydell wrote:
> > @@ -2632,6 +2735,12 @@ static void gicv3_cpuif_el_change_hook(ARMCPU *cpu,
> > void *opaque)
> > GICv3CPUState *cs = opaque;
> >
> > gicv3_cpuif_update(cs);
> > +/*
> > + * Becaus
On 4/8/22 07:15, Peter Maydell wrote:
The CPU interface changes to support vLPIs are fairly minor:
in the parts of the code that currently look at the list registers
to determine the highest priority pending virtual interrupt, we
must also look at the highest priority pending vLPI. To do this
we
The CPU interface changes to support vLPIs are fairly minor:
in the parts of the code that currently look at the list registers
to determine the highest priority pending virtual interrupt, we
must also look at the highest priority pending vLPI. To do this
we change hppvi_index() to check the vLPI a
