Re: [PATCH 20/37] target/i386: reimplement 0x0f 0x60-0x6f, add AVX

2022-09-13 Thread Richard Henderson
On 9/13/22 11:56, Paolo Bonzini wrote: On Mon, Sep 12, 2022 at 1:41 PM Richard Henderson wrote: On 9/12/22 00:04, Paolo Bonzini wrote: +/* + * 00 = p* Pq, Qq (if mmx not NULL; no VEX) + * 66 = vp* Vx, Hx, Wx + * + * These are really the same encoding, because 1) V is the same as P when VEX.V

Re: [PATCH 20/37] target/i386: reimplement 0x0f 0x60-0x6f, add AVX

2022-09-13 Thread Paolo Bonzini
On Mon, Sep 12, 2022 at 1:41 PM Richard Henderson wrote: > > On 9/12/22 00:04, Paolo Bonzini wrote: > > +/* > > + * 00 = p* Pq, Qq (if mmx not NULL; no VEX) > > + * 66 = vp* Vx, Hx, Wx > > + * > > + * These are really the same encoding, because 1) V is the same as P when > > VEX.V > > + * is not

Re: [PATCH 20/37] target/i386: reimplement 0x0f 0x60-0x6f, add AVX

2022-09-12 Thread Richard Henderson
On 9/12/22 00:04, Paolo Bonzini wrote: +static void decode_0F6F(DisasContext *s, CPUX86State *env, X86OpEntry *entry, uint8_t *b) +{ +if (s->prefix & PREFIX_REPNZ) { +entry->gen = NULL; Are these lines really required with the p_00_66_f3 spec on the group entry? +} else if (s

Re: [PATCH 20/37] target/i386: reimplement 0x0f 0x60-0x6f, add AVX

2022-09-12 Thread Richard Henderson
On 9/12/22 00:04, Paolo Bonzini wrote: +/* + * 00 = p* Pq, Qq (if mmx not NULL; no VEX) + * 66 = vp* Vx, Hx, Wx + * + * These are really the same encoding, because 1) V is the same as P when VEX.V + * is not present 2) P and Q are the same as H and W apart from MM/XMM + */ +static inline void ge

[PATCH 20/37] target/i386: reimplement 0x0f 0x60-0x6f, add AVX

2022-09-11 Thread Paolo Bonzini
These are both MMX and SSE/AVX instructions, except for vmovdqu. In both cases the inputs and output is in s->ptr{0,1,2}, so the only difference between MMX, SSE, and AVX is which helper to call. PCMPGT, MOVD and MOVQ are implemented using gvec. The amount of macro magic for generating functions