On Thu, May 18, 2023 at 4:21 PM Loïc Lefort wrote:
>
> Is there a reason to keep RISCV_EXCP_SEMIHOST handling separate from other
> exceptions?
> Otherwise it could be moved in the switch block just a few lines below.
I agree. I will move it to the switch in the next series.
Thanks
>
> On Thu,
Is there a reason to keep RISCV_EXCP_SEMIHOST handling separate from
other exceptions?
Otherwise it could be moved in the switch block just a few lines below.
On Thu, May 18, 2023 at 1:39 PM Rajnesh Kanwal wrote:
> RISCV_EXCP_SEMIHOST is set to 0x10, which can also be a local
> interrupt as well
RISCV_EXCP_SEMIHOST is set to 0x10, which can also be a local
interrupt as well. This change adds a check for async flag
before invoking semihosting logic.
Signed-off-by: Rajnesh Kanwal
---
target/riscv/cpu_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv