On Fri, 3 Mar 2023 at 16:16, Chen Baozi wrote:
>
> DynamIQ Shared Unit (DSU) contains system control registers in the SCU
> and L3 logic which are implemented as the system registers for the cores
> in the cluster. Add DSU control registers and enable it to the supported
> cores.
>
> Signed-off-by
DynamIQ Shared Unit (DSU) contains system control registers in the SCU
and L3 logic which are implemented as the system registers for the cores
in the cluster. Add DSU control registers and enable it to the supported
cores.
Signed-off-by: Chen Baozi
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target/arm/cpu_tcg.c | 52
