On Fri, 27 Jan 2023 17:02:36 +
Fan Ni wrote:
> On Fri, Jan 27, 2023 at 10:01:49AM +, Jonathan Cameron wrote:
>
> > On Thu, 26 Jan 2023 21:57:35 +
> > Fan Ni wrote:
> >
> > > On Wed, Jan 25, 2023 at 03:27:03PM +, Jonathan Cameron wrote:
> > >
> > > > The CXL r3.0 specificat
On Fri, Jan 27, 2023 at 10:01:49AM +, Jonathan Cameron wrote:
> On Thu, 26 Jan 2023 21:57:35 +
> Fan Ni wrote:
>
> > On Wed, Jan 25, 2023 at 03:27:03PM +, Jonathan Cameron wrote:
> >
> > > The CXL r3.0 specification allows for there to be no HDM decoders on CXL
> > > Host Bridges if
On Thu, 26 Jan 2023 21:57:35 +
Fan Ni wrote:
> On Wed, Jan 25, 2023 at 03:27:03PM +, Jonathan Cameron wrote:
>
> > The CXL r3.0 specification allows for there to be no HDM decoders on CXL
> > Host Bridges if they have only a single root port. Instead, all accesses
> > directed to the hos
On Wed, Jan 25, 2023 at 03:27:03PM +, Jonathan Cameron wrote:
> The CXL r3.0 specification allows for there to be no HDM decoders on CXL
> Host Bridges if they have only a single root port. Instead, all accesses
> directed to the host bridge (as specified in CXL Fixed Memory Windows)
> are ass
The CXL r3.0 specification allows for there to be no HDM decoders on CXL
Host Bridges if they have only a single root port. Instead, all accesses
directed to the host bridge (as specified in CXL Fixed Memory Windows)
are assumed to be routed to the single root port.
Linux currently assumes this im
The CXL r3.0 specification allows for there to be no HDM decoders on CXL
Host Bridges if they have only a single root port. Instead, all accesses
directed to the host bridge (as specified in CXL Fixed Memory Windows)
are assumed to be routed to the single root port.
Linux currently assumes this im
