Re: [PATCH 18/26] target/riscv: convert SiFive U models to RISCVCPUDef

On Mon, May 12, 2025 at 7:54 PM Paolo Bonzini wrote: > > Signed-off-by: Paolo Bonzini Reviewed-by: Alistair Francis Alistair > --- > target/riscv/cpu-qom.h | 1 + > target/riscv/cpu.c | 79 +++--- > 2 files changed, 37 insertions(+), 43 deletions(-) >

[PATCH 18/26] target/riscv: convert SiFive U models to RISCVCPUDef

Signed-off-by: Paolo Bonzini --- target/riscv/cpu-qom.h | 1 + target/riscv/cpu.c | 79 +++--- 2 files changed, 37 insertions(+), 43 deletions(-) diff --git a/target/riscv/cpu-qom.h b/target/riscv/cpu-qom.h index 0f9be15e47b..1ee05eb393d 100644 --- a/targ