On Sat, 23 May 2020 at 13:18, Emilio G. Cota wrote:
>
> On Fri, May 22, 2020 at 23:36:18 +0100, Peter Maydell wrote:
> > So is this:
> > (a) a TSan false positive, because we've analysed the use
> > of this struct field and know it's not a race because
> > [details], but which we're cho
On Fri, May 22, 2020 at 23:36:18 +0100, Peter Maydell wrote:
> So is this:
> (a) a TSan false positive, because we've analysed the use
> of this struct field and know it's not a race because
> [details], but which we're choosing to silence in this way
> (b) an actual race for which the
On Fri, 22 May 2020 at 22:33, Robert Foley wrote:
> On Fri, 22 May 2020 at 13:44, Peter Maydell wrote:
> > Every target's has_work function seems to access
> > cs->interrupt_request without using atomic_read() :
> > why does Arm need to do something special here?
> >
> > More generally, the only
On Fri, 22 May 2020 at 13:44, Peter Maydell wrote:
>
> On Fri, 22 May 2020 at 17:15, Robert Foley wrote:
> >
> > For example:
> > WARNING: ThreadSanitizer: data race (pid=11134)
> > Atomic write of size 4 at 0x7bbce0ac by main thread (mutexes: write
> > M875):
> > #0 __tsan_atomic32_st
On Fri, 22 May 2020 at 17:15, Robert Foley wrote:
>
> For example:
> WARNING: ThreadSanitizer: data race (pid=11134)
> Atomic write of size 4 at 0x7bbce0ac by main thread (mutexes: write
> M875):
> #0 __tsan_atomic32_store (qemu-system-aarch64+0x394d84)
> #1 cpu_reset_interrupt hw/
For example:
WARNING: ThreadSanitizer: data race (pid=11134)
Atomic write of size 4 at 0x7bbce0ac by main thread (mutexes: write M875):
#0 __tsan_atomic32_store (qemu-system-aarch64+0x394d84)
#1 cpu_reset_interrupt hw/core/cpu.c:107:5 (qemu-system-aarch64+0x842f90)
#2 arm_cpu_set
