Re: [PATCH 16/26] target/riscv: convert SiFive E CPU models to RISCVCPUDef
On Mon, May 12, 2025 at 7:54 PM Paolo Bonzini wrote: > > Signed-off-by: Paolo Bonzini Reviewed-by: Alistair Francis Alistair > --- > target/riscv/cpu-qom.h | 1 + > target/riscv/cpu.c | 74 -- > 2 files changed, 21 insertions(+), 54 deletions(-) >
[PATCH 16/26] target/riscv: convert SiFive E CPU models to RISCVCPUDef
Signed-off-by: Paolo Bonzini --- target/riscv/cpu-qom.h | 1 + target/riscv/cpu.c | 74 -- 2 files changed, 21 insertions(+), 54 deletions(-) diff --git a/target/riscv/cpu-qom.h b/target/riscv/cpu-qom.h index 4cfdb74891e..0f9be15e47b 100644 --- a/targ