On 6/10/21 5:40 AM, Peter Maydell wrote:
+#define DO_1OP(OP, ESIZE, TYPE, H, FN) \
+void HELPER(mve_##OP)(CPUARMState *env, void *vd, void *vm) \
+{ \
+TYPE *d = vd, *m = vm;
On Tue, 8 Jun 2021 at 23:10, Richard Henderson
wrote:
>
> On 6/7/21 9:57 AM, Peter Maydell wrote:
> > Implement the MVE VCLZ insn (and the necessary machinery
> > for MVE 1-input vector ops).
> >
> > Note that for non-load instructions predication is always performed
> > at a byte level granularit
On 6/7/21 9:57 AM, Peter Maydell wrote:
Implement the MVE VCLZ insn (and the necessary machinery
for MVE 1-input vector ops).
Note that for non-load instructions predication is always performed
at a byte level granularity regardless of element size (R_ZLSJ),
and so the masking logic here differs
Implement the MVE VCLZ insn (and the necessary machinery
for MVE 1-input vector ops).
Note that for non-load instructions predication is always performed
at a byte level granularity regardless of element size (R_ZLSJ),
and so the masking logic here differs from that used in the VLDR
and VSTR helpe
