RE: [PATCH 1/5] target/riscv: Add basic vmstate description of CPU

orn.de; Zhangxiaofeng > (F) ; alistair.fran...@wdc.com; yinyipeng > ; pal...@dabbelt.com; Wubin (H) > ; dengkai (A) > Subject: Re: [PATCH 1/5] target/riscv: Add basic vmstate description of CPU > > On 9/28/20 9:03 PM, Yifei Jiang wrote: > > --- /dev/null >

Re: [PATCH 1/5] target/riscv: Add basic vmstate description of CPU

On 9/28/20 9:03 PM, Yifei Jiang wrote: > --- /dev/null > +++ b/target/riscv/machine.c > @@ -0,0 +1,59 @@ > +#include "qemu/osdep.h" > +#include "cpu.h" All new files must contain license boilerplate. Otherwise, considering the followups, this seems ok. r~

[PATCH 1/5] target/riscv: Add basic vmstate description of CPU

Add basic CPU state description to the newly created machine.c Signed-off-by: Yifei Jiang Signed-off-by: Yipeng Yin --- target/riscv/cpu.c | 7 - target/riscv/cpu.h | 4 +++ target/riscv/machine.c | 59 target/riscv/meson.build | 3 +