On 2023/6/12 11:10, Weiwei Li wrote:
On 2023/6/12 10:45, LIU Zhiwei wrote:
On 2023/5/29 20:17, Weiwei Li wrote:
Upon MRET or explicit memory access with MPRV=1, MPV should be ignored
when MPP=PRV_M.
Does MPP==PRV_M always indicate the MPV==0?
No, I think . The spec doesn't restrict this.
On 2023/6/12 10:45, LIU Zhiwei wrote:
On 2023/5/29 20:17, Weiwei Li wrote:
Upon MRET or explicit memory access with MPRV=1, MPV should be ignored
when MPP=PRV_M.
Does MPP==PRV_M always indicate the MPV==0?
No, I think . The spec doesn't restrict this. When MPP=PRV_M, MPV wll be
0 in norma
On 2023/5/29 20:17, Weiwei Li wrote:
Upon MRET or explicit memory access with MPRV=1, MPV should be ignored
when MPP=PRV_M.
Does MPP==PRV_M always indicate the MPV==0?
Zhiwei
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu_helper.c | 3 ++-
target/riscv/op_h
On Mon, May 29, 2023 at 10:19 PM Weiwei Li wrote:
>
> Upon MRET or explicit memory access with MPRV=1, MPV should be ignored
> when MPP=PRV_M.
>
> Signed-off-by: Weiwei Li
> Signed-off-by: Junqiang Wang
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu_helper.c | 3 ++-
> targ
On 5/29/23 09:17, Weiwei Li wrote:
Upon MRET or explicit memory access with MPRV=1, MPV should be ignored
when MPP=PRV_M.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
Reviewed-by: Daniel Henrique Barboza
target/riscv/cpu_helper.c | 3 ++-
target/riscv/op_helper.c | 3 +
On 5/30/23 21:27, Weiwei Li wrote:
On 2023/5/31 04:23, Daniel Henrique Barboza wrote:
On 5/29/23 09:17, Weiwei Li wrote:
Upon MRET or explicit memory access with MPRV=1, MPV should be ignored
when MPP=PRV_M.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu_h
On 2023/5/31 04:23, Daniel Henrique Barboza wrote:
On 5/29/23 09:17, Weiwei Li wrote:
Upon MRET or explicit memory access with MPRV=1, MPV should be ignored
when MPP=PRV_M.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu_helper.c | 3 ++-
target/riscv/op_help
On 5/29/23 09:17, Weiwei Li wrote:
Upon MRET or explicit memory access with MPRV=1, MPV should be ignored
when MPP=PRV_M.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu_helper.c | 3 ++-
target/riscv/op_helper.c | 3 ++-
2 files changed, 4 insertions(+), 2 d
Upon MRET or explicit memory access with MPRV=1, MPV should be ignored
when MPP=PRV_M.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu_helper.c | 3 ++-
target/riscv/op_helper.c | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/target/riscv/cpu_