Hello Nick,
[ ... ]
+case TOD_TX_TTYPE_CTRL_REG:
+if (val & PPC_BIT(35)) { /* SCOM addressing */
+uint32_t addr = val >> 32;
+uint32_t reg = addr & 0xfff;
+PnvCore *pc;
+
+if (reg != PC_TOD) {
+qemu_log_mask(LOG_GUEST_E
On Tue Jun 6, 2023 at 12:57 AM AEST, Cédric Le Goater wrote:
> On 6/4/23 01:36, Nicholas Piggin wrote:
> > diff --git a/hw/ppc/pnv_chiptod.c b/hw/ppc/pnv_chiptod.c
> > new file mode 100644
> > index 00..04ef703e0f
> > --- /dev/null
> > +++ b/hw/ppc/pnv_chiptod.c
> > @@ -0,0 +1,488 @@
> > +
On 6/4/23 01:36, Nicholas Piggin wrote:
The chiptod is a pervasive facility which can keep TOD (time-of-day),
synchronise it across multiple chips, and can move that TOD to or from
the core timebase units.
This driver implements basic emulation of chiptod registers sufficient
to successfully run
The chiptod is a pervasive facility which can keep TOD (time-of-day),
synchronise it across multiple chips, and can move that TOD to or from
the core timebase units.
This driver implements basic emulation of chiptod registers sufficient
to successfully run the skiboot chiptod synchronisation proce
