On Fri, Jun 19, 2020 at 10:11 AM Alexander Richardson
wrote:
>
> On Tue, 16 Jun 2020 at 20:30, Atish Patra wrote:
> >
> > Currently, all riscv machines have identical reset vector code
> > implementations with memory addresses being different for all machines.
> > They can be easily combined into
On Tue, 16 Jun 2020 at 20:30, Atish Patra wrote:
>
> Currently, all riscv machines have identical reset vector code
> implementations with memory addresses being different for all machines.
> They can be easily combined into a single function in common code.
>
> Move it to common function and let
On Thu, Jun 18, 2020 at 1:03 AM Bin Meng wrote:
>
> On Wed, Jun 17, 2020 at 3:30 AM Atish Patra wrote:
> >
> > Currently, all riscv machines have identical reset vector code
> > implementations with memory addresses being different for all machines.
> > They can be easily combined into a single f
On Wed, Jun 17, 2020 at 3:30 AM Atish Patra wrote:
>
> Currently, all riscv machines have identical reset vector code
> implementations with memory addresses being different for all machines.
> They can be easily combined into a single function in common code.
>
> Move it to common function and le
Currently, all riscv machines have identical reset vector code
implementations with memory addresses being different for all machines.
They can be easily combined into a single function in common code.
Move it to common function and let all the machines use the common function.
Signed-off-by: Ati
