On 2024/1/31 13:06, Richard Henderson wrote:
On 1/30/24 21:11, LIU Zhiwei wrote:
+/* This stub just works for making vendors array not empty */
+riscv_csr_operations stub_csr_ops[CSR_TABLE_SIZE];
+static inline bool never_p(const RISCVCPUConfig *cfg)
+{
+ return false;
+}
+
+void riscv_tcg_
On 1/30/24 21:11, LIU Zhiwei wrote:
+/* This stub just works for making vendors array not empty */
+riscv_csr_operations stub_csr_ops[CSR_TABLE_SIZE];
+static inline bool never_p(const RISCVCPUConfig *cfg)
+{
+return false;
+}
+
+void riscv_tcg_cpu_register_vendor_csr(RISCVCPU *cpu)
+{
+s
riscv specification allows custom CSRs in decode area. So we should
register all vendor CSRs in cpu realize stage.
Signed-off-by: LIU Zhiwei
---
target/riscv/cpu.c | 3 +++
target/riscv/tcg/tcg-cpu.c | 26 ++
target/riscv/tcg/tcg-cpu.h | 1 +
3 files changed, 30