Re: [PATCH 1/2] target/riscv: Fix the hpmevent mask

On Thu, Jan 16, 2025 at 10:51 AM Atish Patra wrote: > > As per the latest privilege specification v1.13[1], the sscofpmf > only reserves first 8 bits of hpmeventX. Update the corresponding > masks accordingly. > > [1]https://github.com/riscv/riscv-isa-manual/issues/1578 > > Signed-off-by: Atish Pa

Re: [PATCH 1/2] target/riscv: Fix the hpmevent mask

On 1/15/25 9:49 PM, Atish Patra wrote: As per the latest privilege specification v1.13[1], the sscofpmf only reserves first 8 bits of hpmeventX. Update the corresponding masks accordingly. [1]https://github.com/riscv/riscv-isa-manual/issues/1578 Signed-off-by: Atish Patra --- Reviewed-by:

[PATCH 1/2] target/riscv: Fix the hpmevent mask

As per the latest privilege specification v1.13[1], the sscofpmf only reserves first 8 bits of hpmeventX. Update the corresponding masks accordingly. [1]https://github.com/riscv/riscv-isa-manual/issues/1578 Signed-off-by: Atish Patra --- target/riscv/cpu_bits.h | 9 ++--- 1 file changed, 6