Re: [PATCH 1/2] target/riscv: Check for CF_PARALLEL instead of qemu_tcg_mttcg_enabled

2023-06-29 Thread Philippe Mathieu-Daudé
On 29/6/23 18:26, Alex Bennée wrote: Philippe Mathieu-Daudé writes: A CPU knows whether MTTCG is enabled or not because it is reflected in its TCG flags via the CF_PARALLEL bit. Suggested-by: Alex Bennée Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/cpu.c | 2 +- 1 file changed

Re: [PATCH 1/2] target/riscv: Check for CF_PARALLEL instead of qemu_tcg_mttcg_enabled

2023-06-29 Thread Alex Bennée
Philippe Mathieu-Daudé writes: > A CPU knows whether MTTCG is enabled or not because it is > reflected in its TCG flags via the CF_PARALLEL bit. > > Suggested-by: Alex Bennée > Signed-off-by: Philippe Mathieu-Daudé > --- > target/riscv/cpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deleti

[PATCH 1/2] target/riscv: Check for CF_PARALLEL instead of qemu_tcg_mttcg_enabled

2023-06-29 Thread Philippe Mathieu-Daudé
A CPU knows whether MTTCG is enabled or not because it is reflected in its TCG flags via the CF_PARALLEL bit. Suggested-by: Alex Bennée Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/ri